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[DSP programDEC6713_EDMA

Description: 本源代码实现的功能是对DSP6713的EDMA初始化,并开辟了内存空间实现了EDMA的PONG-PING操作。-Source code implementation of the function is the DSP6713 s EDMA initialization, and open up the memory space to achieve the EDMA s PONG-PING operation.
Platform: | Size: 55296 | Author: songtao | Hits:

[Other GamesA_Ping_Gam172851442004

Description: A small compact ping pong game, written in Delphi 5, compatible with newer versions. Has issues running windows 8. Does not use any modules or third-party packs. 100 fully coded scratch -A small compact ping pong game, written in Delphi 5, compatible with newer versions. Has issues running windows 8. Does not use any modules or third-party packs. 100 fully coded scratch
Platform: | Size: 33792 | Author: johny john | Hits:

[OtherExample-s1-1

Description: 面积和速度的互换是FPGA/CPLD设计的一个重要思想。从理论上讲,一个设计如果时序余量较大,所能运行的频率远远高于设计要求,那么就能通过功能模块复用减少整个设计消耗的芯片面积,这就是用速度的优势换面积的节约;反之,如果一个设计的时序要求很高,普通方法达不到设计频率,那么一般可以通过将数据流串并转换,并行复制多个操作模块,对整个设计采取“乒乓操作”和“串并转换”的思想进行处理,在芯片输出模块处再对数据进行“并串转换”。从宏观上看,整个芯片满足了处理速度的要求,这相当于用面积复制换取速度的提高。面积和速度互换的具体操技巧很多,比如模块复用、“乒乓操作”、“串并转换”等,需要大家在日后工作中积累掌握-Size and speed of exchange is an important idea FPGA/CPLD design. In theory, a design if the timing margin is large, the frequency can run much higher than the design requirements, so you can reuse the function module by reducing the chip area consumed by the entire design, which is to use the advantages of the speed of change area savings on the contrary, if a design s timing requirements are high, less than the design frequency ordinary method, then the general data flow through the string and convert parallel copy multiple operating modules, designed to take on the whole ping-pong operation and serial to parallel conversion, the idea is processed in chip output module at which data can be and string conversion. From a macro point of view, the entire chip to meet the requirements of processing speed, which is equivalent to replicate increase in exchange rate with the area. Rate swap area and the specific skills a lot of exercise, such as module reuse, ping-pong operation , s
Platform: | Size: 236544 | Author: zhuchaoyong | Hits:

[JSP/JavaNatureFree

Description: Ping pong style nature
Platform: | Size: 4588544 | Author: unknown99 | Hits:

[CSharpA-family-of-3

Description: 一个三口之家,大家都知道父亲会开车,母亲会唱 歌。但是其父亲还会修电视机,只有家里人知道。小 孩既会开车又会唱歌甚至也会修电视机。母亲瞒着任 何人在外面做小工以补贴家用。此外小孩还会打乒乓 球。 编写程序测试这三口之家从事的一天活动:父亲先出 去开车,然后母亲出去上班(唱歌),母亲下班后去 做两小时的小工。小孩在俱乐部打球,在父亲回家 后,开车玩,然后又高兴地唱歌。晚上,小孩和父亲 一起修电视机。 后来父亲的修电视机技术让大家都知道了,人们经常 上门要他修电视机。这时程序要做怎样的改动。-A family of three, everyone knew my father would drive, mother can sing Song. But his father will repair the TV, only family know. small Children can drive and can sing even will repair the TV set. Mother hide from Who do coolie to subsidies home outside. Children also can play ping-pong The ball. Write a program to test the three-person family day activities: father out first To drive, and then mother go out to work (singing), after work to go to the mother Two hours to do coolie. Children play at the club and in the father s home After the car to play, then sing happily. In the evening, children and father To repair the TV together. Later, father of the television technology let everyone know that people often The door wanted him to repair the TV. Then the program what kind of changes to do.
Platform: | Size: 1024 | Author: liyang | Hits:

[OtherNandBuffer

Description: verilog编写,含三路正弦信号发生器,三路数据乒乓缓存模块。乒乓缓存读写控制采用三段式状态机实现。-The project contains a 3-channel sine generator and a 3-channel ping-pong buffer which is written in verilog. The write and read control of buffer is implemented in 3-segment FSM.
Platform: | Size: 8192 | Author: shanhuancui | Hits:

[OtherHOT_KNIFE20150123

Description: 这是一个MSP430EEPROM的源程序。-Ping-pong for continuous data flow
Platform: | Size: 63488 | Author: SKY | Hits:

[Game Programpong2ball

Description: JAVA网页版小游戏,类似乒乓球游戏,适合初学者参考-JAVA Web version game, similar to the ping-pong game, suitable for beginners reference
Platform: | Size: 4096 | Author: cryscal | Hits:

[VHDL-FPGA-VerilogPingPang_buffer_20160526

Description: 源码仿真 乒乓 缓存,实现数据流的传输,含有仿真测试文件,vivado工程。-Source simulation ping-pong cache data stream transmission, the file containing the simulation test, vivado project.
Platform: | Size: 2422784 | Author: 贾俊超 | Hits:

[Other GamesPingPongGame.java

Description: Ping Pong basic code
Platform: | Size: 1024 | Author: dharmendra | Hits:

[Other GamesLCD_Graph_PingPong

Description: nuvoton project ping pong
Platform: | Size: 6144 | Author: ardian | Hits:

[FlashMXniosII_hw_dev_tutorial

Description: 在DE2开发板上实现的一个简单乒乓球的程序。开发语言-verilog-In the DE2 development board to achieve a simple ping-pong process. Development language verilog
Platform: | Size: 13427712 | Author: wanganping | Hits:

[Other Gamespingpong

Description: This gives the implementation of the ping pong game
Platform: | Size: 2048 | Author: devi | Hits:

[OS programpingpangqiu

Description: 1kHz时钟频率 A方发球 A方击球 B方发球 B方击球 系统复位端 16个LED代表乒乓球台(甲在左,乙在右) 数码管选择信号 7段显示控制信号(abcdefg)-1 KHZ clock frequency A party to serve A party to hit the ball Party B serve Party B to hit the ball The system reset end 16 leds on behalf of the ping-pong table (at right) at the left, b Digital tube selection signal 7 segment display control signal (abcdefg)
Platform: | Size: 1024 | Author: 浅蓝 | Hits:

[VHDL-FPGA-Verilogpingpang_ram

Description: 乒乓RAM静态随机存储器的控制,用于解决数据流连续存储问题。-Ping pong RAM static random access control, to solve the problem of continuous data flow storage.
Platform: | Size: 2227200 | Author: fengdelong | Hits:

[Program docLoRaMac-node-master (1)

Description: lorawan node 最新协议 SX1272/76 radio drivers plus Ping-Pong firmware and LoRaWAN node firmware implementation.(1. Introduction ---------------- The aim of this project is to show examples of the LoRaWAN specification endpoint firmware implementation. **REMARK 1:** *The Semtech implementation is a EU868 band Class A and Class C endpoint implementation fully compatible with LoRaWAN 1.0 specification.* **REMARK 2:** *The Class C normal operation has been tested using the Actility servers.* **REMARK 3:** *The Class C Multicast messages handling is not yet tested.*)
Platform: | Size: 4018176 | Author: tian888888 | Hits:

[Embeded-SCM DevelopSTM32F051_SX1278_LORA_乒乓测试

Description: 本工程采用STM32F051驱动SX1278ROLA芯片进行乒乓测试,发送和接收的程序都集成在了一起,在程序内部采用宏开关选择,经过测试完全可以用(This project uses STM32F051 driver SX1278ROLA chip for ping pong test. The sending and receiving programs are integrated together, and the macro switch is selected in the program. After testing, it can be used.)
Platform: | Size: 4529152 | Author: 泽绒扎西 | Hits:

[OtherFeedback_IA

Description: A precision general-purpose current-feedback instrumentation amplifier (CFIA) that employs a combination of ping-pong auto-zeroing and chopping to cancel its offset and 1/f noise.
Platform: | Size: 1024000 | Author: praba | Hits:

[OtherSampleProjects

Description: ping pong code for sx1276
Platform: | Size: 2352128 | Author: imletuananh1 | Hits:

[VHDL-FPGA-VerilogPPRAM-test

Description: 乒乓缓存,用vhdl编写,用fpga内部ram(Ping-pong buffer, using vhdl to write,)
Platform: | Size: 8834048 | Author: 任天鹏 | Hits:
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